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| NT6865 8-Bit Microcontroller
for Monitor |
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NT6865 |
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| Feature |
- CMOS technology for low power consumption
- Power supply
- Operating voltage range : 4.5V to
5.5V
- Built-in 3.3V regulator
- 8031 8-bit CMOS Micro-Processor (uP) core
- Intel 8031 architecture
- 256-byte Internal DATA Memory
- Two 16-Bit Timer/Counters
- Fully duplex UART
- 5-vector interrupt structure with
two programmable priority levels
- High level C-language for the F/W
development
- On-Chip Oscillator ?12 MHz operating frequency
- Reset
- External Reset Pin
- Low-Voltage Reset
- Watch-Dog Timer Reset
- Program memory
- 512 Bytes On-Chip RAM
- Extended 256-byte Internal DATA Memory
of uP 8031
- External 256-bytes DATA Memory for
Hardware DDC Port
- A/D Converter
- 7-Bit resolution
- 4 selectable Input channels
- Conversion Range ?Absolutely Monotonic
linear from GND to VCC
- Conversion time ?12us
- PWM D/A Converter
- 8-Bit resolution
- 10 selectable output channels
- 6 channels with 5V Push-Pull Structure
- 4 channels with 5V Open-Drain
Structure
- 34 Selectable General Purpose I/O Pins
- Interrupts ?5-vector interrupt structure
with two programmable priority levels for
uP F8031
- TF0: Timer/Counter 0 Overflow Interrupt
- TF1: Timer/Counter 1 Overflow Interrupt
- RI+TI: UART Interrupts
- INT0: Sync Processor Interrupts
- INT1
- External Interrupts: INTE0 &
INTE1
- Invalid Program ROM Address interrupt
- IIC-Bus Port Interrupts
- Sync Processor Unit
- Signal Type ?Separate Sync, Composite
Sync & Digital-Level Sync-On-Green(SOG)
- Powerful Polarity detection for HSYNCI
and VSYNCI
- HSYNCO/VSYNCO polarity-controlled
outputs
- Fast Auto-Mute function
- Half frequency I/O function
- Timer/Counters with 2-lay content
latches for counting sync period/frequency
?stable results can be read
- Clamp pulse output
- Clamp pulse output at either the
leading edge or trailing edge of
HSYNC
- Selectable Clamp pulse width
- Selectable pulse output polarity
- Free-run sync generator
- Test pattern generator
- DDC Port
- Pure hardware solution for VESA DDC1/2B
- Selectable 128/256 Bytes EDID-Buffer
for hardware DDC port
- IIC-bus
- One built-in master/slave I2C bus
interfaces support VESA 2Bi/2B+
- SCL Speed Up to 400Kbps
- Package
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| General Description |
The NT6865 is an 8031 CPU core embedded
micro-controller, which is design for high-performance
monitor control application. It contains an
8-bit 8031 micro-controller, on-chip 32K-byte
mask program ROM, 512-byte internal data memory,
four 7-bit resolution A/D Converter, 10-channel
8-bit resolution PWM DAC, two16-bit timer/counters,
and a UART. Except those, the N6865 have an
internal SYNC processor, hardware DDC solution,
and VESA 2Bi/2B+ master/slave I2C bus interface.
Those functions can help the user to develop
a monitor application as soon as possible.
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