| The 8-bit microcontrollers
P80C557E8, P83C557E8 and P87C557E8 - hereafter referred
to as P8xC557E8 - are manufactured in an |
| advanced CMOS process and
are derivatives of the 80C51 microcontroller family.
|
| |
| The P8xC557E8 contains a volatile
2048 bytes read/write Data Memory, five 8-bit I/O ports,
one 8-bit input port, two 16-bit timer/event |
| counters (identical to the
timers of the 80C51), an additional 16-bit timer coupled
to capture and compare latches, a 15-source, two- |
| priority-level, nested interrupt
structure, an 8-input ADC, a dual Digital-to-Analog
Convertor (DAC), Pulse Width Modulated interface, two |
| serial interfaces (UART and
I-bus), a Watchdog Timer, an on-chip oscillator and
timing circuits. |
| |
| The P8xC557E8 is available
in 3 versions: |
| *
P80C557E8: ROMless version
|
| *
P83C557E8: containing a non-volatile
64 kbytes mask programmable ROM |
| *
P87C557E8: containing 64 kbytes programmable EPROM/OTP.
|
| |
| The P8xC557E8 is a control-oriented
CPU with on-chip Program and Data Memory; it cannot
be extended with external Program Memory. |
| It can access up to 64 kbytes
of external Data Memory. For systems requiring extra
capability, the P8xC557E8 can be expanded using |
| standard TTL compatible memories
and peripherals. |
| |
| In addition, the P8xC557E8
has two software selectable reduced power modes: Idle
mode and Power-down mode. The Idle mode |
| freezes the CPU while allowing
the RAM, timers, serial ports, and interrupt system
to continue functioning. The Power-down mode saves |
| the RAM contents but freezes
the oscillator, causing all other chip functions to
be inoperative.The Power-down mode can be terminated
by |
| an external reset, by the
seconds interrupt and by any one of the two external
interrupts. |
| |
| The device also functions
as an arithmetic processor having facilities for both
binary and BCD arithmetic as well as bit-handling |
| capabilities. The instruction
set of the P8xC557E8 is the same as the 80C51 and consists
of over 100 instructions: 49 one-byte, 45 two- |
| byte, and 17 three-byte. With
a 16 MHz system clock, 58 pct of the instructions are
executed in 0.75 μs and 40 pct in 1.5 μs. Multiply and
|
| divide instructions require
3 μs. |
| |
| Electromagnetic
Compatibility (EMC) |
| Primary attention is paid
to the reduction of electromagnetic emission of the
microcontroller P8xC557E8. The following features reduce
|
| the electromagnetic emission
and additionally improve the electromagnetic susceptibility:
|
| *
Four digital part supply voltage pins
(VDD1 to VDD4) and four digital
ground pins (VSS1 to VSS4)are
placed
as pairs of VDDn and |
| VSSn
at two adjacent pins, at each side of the package. |
| *
Separated VDD pins
for the internal logic and the port buffers. |
| *
Internal decoupling capacitance
improves the EMC radiation behaviour and the EMC immunity.
|
| *
External capacitors should
be connected across associated VDDn and VSSn
pins (i.e. VDD1 and VSS1). Lead
length should be |
| as
short as possible. Ceramic chip capacitors are recommended
(100 nF). |
| |
| Recommendation
on ALE |
| For applications that require
no external memory or temporarily no external memory:
the ALE output signal (pulses at a frequency of 1/6
|
| OSC) can be disabled
under software control (bit RFI; SFR: PCON.5); if disabled,
no ALE pulse will occur. ALE pin will be pulled down
|
| internally, switching an external
address latch to a quiet state. The MOVX instruction
will still toggle ALE (external Data Memory is |
| accessed). ALE will retain
its normal HIGH value during Idle mode and a LOW value
during Power-down mode while in the ‘RFI
reduction |
| mode’ |
| Additionally during internal
access (EA = 1) ALE will toggle normally when the address
exceeds the internal Program Memory size. During |
| external access (EA = 0) ALE
will always toggle normally, whether the flag ‘RFI’is
set or not. |
| P8xC557Ex
factsheet |
